Plasma damage immunity of thin gate oxide grown on very lightly N+ implanted silicon

K. P. Cheung; D. Misra; J. I. Colonell; C. T. Liu; Y. Ma; C. P. Chang; W. Y.C. Lai; R. Liu; C. S. Pai

doi:10.1109/55.701426

Plasma damage immunity of thin gate oxide grown on very lightly N⁺ implanted silicon

K. P. Cheung, D. Misra, J. I. Colonell, C. T. Liu, Y. Ma, C. P. Chang, W. Y.C. Lai, R. Liu, C. S. Pai

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

Plasma damage immunity of gate oxide grown on very low dose (2 × 10¹³/cm²) N⁺ implanted silicon is found to be improved comparing to regular gate oxide of similar thickness. Both hole trapping and electron trapping are suppressed by the incorporation of nitrogen into the gate oxide. Hole trapping behavior was determined from the relationship between initial electron trapping slope (IETS) and threshold voltage shifts due to current stress. This method is believed to be far more reliable than the typical method of initial gate voltage lowering during current stress.

Original language	English (US)
Pages (from-to)	231-233
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	19
Issue number	7
DOIs	https://doi.org/10.1109/55.701426
State	Published - Jul 1998

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/55.701426

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@article{85080e364c2a4fde9e8bd9d5921f7666,

title = "Plasma damage immunity of thin gate oxide grown on very lightly N+ implanted silicon",

abstract = "Plasma damage immunity of gate oxide grown on very low dose (2 × 1013/cm2) N+ implanted silicon is found to be improved comparing to regular gate oxide of similar thickness. Both hole trapping and electron trapping are suppressed by the incorporation of nitrogen into the gate oxide. Hole trapping behavior was determined from the relationship between initial electron trapping slope (IETS) and threshold voltage shifts due to current stress. This method is believed to be far more reliable than the typical method of initial gate voltage lowering during current stress.",

author = "Cheung, {K. P.} and D. Misra and Colonell, {J. I.} and Liu, {C. T.} and Y. Ma and Chang, {C. P.} and Lai, {W. Y.C.} and R. Liu and Pai, {C. S.}",

year = "1998",

month = jul,

doi = "10.1109/55.701426",

language = "English (US)",

volume = "19",

pages = "231--233",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "7",

}

TY - JOUR

T1 - Plasma damage immunity of thin gate oxide grown on very lightly N+ implanted silicon

AU - Cheung, K. P.

AU - Misra, D.

AU - Colonell, J. I.

AU - Liu, C. T.

AU - Ma, Y.

AU - Chang, C. P.

AU - Lai, W. Y.C.

AU - Liu, R.

AU - Pai, C. S.

PY - 1998/7

Y1 - 1998/7

N2 - Plasma damage immunity of gate oxide grown on very low dose (2 × 1013/cm2) N+ implanted silicon is found to be improved comparing to regular gate oxide of similar thickness. Both hole trapping and electron trapping are suppressed by the incorporation of nitrogen into the gate oxide. Hole trapping behavior was determined from the relationship between initial electron trapping slope (IETS) and threshold voltage shifts due to current stress. This method is believed to be far more reliable than the typical method of initial gate voltage lowering during current stress.

AB - Plasma damage immunity of gate oxide grown on very low dose (2 × 1013/cm2) N+ implanted silicon is found to be improved comparing to regular gate oxide of similar thickness. Both hole trapping and electron trapping are suppressed by the incorporation of nitrogen into the gate oxide. Hole trapping behavior was determined from the relationship between initial electron trapping slope (IETS) and threshold voltage shifts due to current stress. This method is believed to be far more reliable than the typical method of initial gate voltage lowering during current stress.

UR - http://www.scopus.com/inward/record.url?scp=0032121584&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0032121584&partnerID=8YFLogxK

U2 - 10.1109/55.701426

DO - 10.1109/55.701426

M3 - Article

AN - SCOPUS:0032121584

SN - 0741-3106

VL - 19

SP - 231

EP - 233

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 7

ER -

Plasma damage immunity of thin gate oxide grown on very lightly N⁺ implanted silicon

Abstract

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