RAM BIST

Research output: Contribution to conferencePaperpeer-review

2 Scopus citations

Abstract

A RAM test scheme is described. The scheme can be used in both built-in mode and off-chip/module mode. Fault diagnosis is simple and never subjected to aliasing. Depending upon the test length, many kinds of failures can be detected, including stuck-cells, decoder faults, and shorts. Used in the built-in mode, the scheme does not slow down normal array operation and the hardware overhead is very low.

Original languageEnglish (US)
Pages204-211
Number of pages8
StatePublished - Jan 1 2000
EventIMTC/2000 - 17th IEEE Instrumentation and Measurement Technology Conference 'Smart Connectivity: Integrating Measurement and Control' - Baltimore, MD, USA
Duration: May 1 2000May 4 2000

Other

OtherIMTC/2000 - 17th IEEE Instrumentation and Measurement Technology Conference 'Smart Connectivity: Integrating Measurement and Control'
CityBaltimore, MD, USA
Period5/1/005/4/00

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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