@inproceedings{0eac3d408fa848dd8a46ea2011c229e9,
title = "Reduction of interface states in Ge/High-k gate stacks and its reliability implications",
abstract = "This work reviews a process that was developed to enhance the interface state density of a Ge/High-k interface. A slot plane antenna plasma oxidation (SPAO) process was implemented during dielectric deposition steps to fabricate TiN/ZrO2/Al2O3/p-Ge MOS gate stacks. A poor interface was observed with SPAO being performed before Al2O3/ZrO2 gate stack deposition because of fragmented GeOX interfacial layer formation. Significant decrease in interface state density was observed because of the formation of a stable and moderately thick GeOX interfacial layer when SPAO was performed in between Al2O3/ZrO2 deposition. When SPAO was performed after the deposition of both the high-k layers, higher Dit was observed suggesting a GeO2 layer formation. Time Dependent Dielectric Breakdown (TDDB) measurements suggest that stable and moderately thick GeOX interfacial layer (SPAO was in-between the two high-k layers) provides better immunity to degradation under stress. It was further observed that if GeO2 is at the interface then it degrades at a faster rate. The trap distribution in dielectric layers and interfacial layer properties contribute to the dielectric breakdown. SPAO seems to be an excellent processing step during high-k deposition to enhance the Ge/High-k devices.",
keywords = "Equivalent oxide thickness (EOT), Flat-band voltage shift (Δ VFB), Interface state density (Dit), SPAO, Stress induced leakage current (SILC), Time dependent dielectric breakdown (TDDB)",
author = "D. Misra and Ding, {Y. M.} and S. Mukhopadhyay and Ganapathi, {K. L.} and N. Bhat",
note = "Funding Information: This work was supported by with the Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07102 USA D. Misra, Y.M. Ding and S. Mukhopadhyay are with the Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07102 USA (e-mail: dmisra@njit.edu). Publisher Copyright: {\textcopyright} 2016 IEEE.; 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 ; Conference date: 25-10-2016 Through 28-10-2016",
year = "2017",
month = jul,
day = "31",
doi = "10.1109/ICSICT.2016.7998962",
language = "English (US)",
series = "2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "499--503",
editor = "Ru Huang and Ting-Ao Tang and Yu-Long Jiang",
booktitle = "2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings",
address = "United States",
}