Redundancy revisited

Jacob Savir

doi:10.1109/92.736135

Redundancy revisited

Jacob Savir

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

This paper shows that when it comes to complementary metal-oxide-semiconductor (CMOS) designs undetectability does not necessarily imply redundancy. The definition of redundancy is extended to account for the special behavior encountered in CMOS designs. The accuracy of the new redundancy definition has been tested on several CMOS chips and has been found to be correct.

Original language	English (US)
Pages (from-to)	620-624
Number of pages	5
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	6
Issue number	4
DOIs	https://doi.org/10.1109/92.736135
State	Published - 1998

All Science Journal Classification (ASJC) codes

Software
Hardware and Architecture
Electrical and Electronic Engineering

Keywords

Combinational redundancy
Stuck-faults
Test-pattern generation
Undetectability

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10.1109/92.736135

Cite this

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abstract = "This paper shows that when it comes to complementary metal-oxide-semiconductor (CMOS) designs undetectability does not necessarily imply redundancy. The definition of redundancy is extended to account for the special behavior encountered in CMOS designs. The accuracy of the new redundancy definition has been tested on several CMOS chips and has been found to be correct.",

keywords = "Combinational redundancy, Stuck-faults, Test-pattern generation, Undetectability",

author = "Jacob Savir",

note = "Funding Information: Manuscript received September 1, 1996; revised July 1, 1997. This work was supported in part by NJIT SBR funds. The author is with the Electrical and Computer Engineering Department, New Jersey Institute of Technology, Newark, NJ 07102 USA. Publisher Item Identifier S 1063-8210(98)08293-6.",

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KW - Stuck-faults

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KW - Undetectability

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Redundancy revisited

Abstract

All Science Journal Classification (ASJC) codes

Keywords

Access to Document

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