ReFACE: Efficient Design Methodology for Acceleration of Digital Filter Implementations

Keyphrases

• Design Methodology 100%
• Residue number System 100%
• Digital Filter Implementation 100%
• In-memory 66%
• Finite Impulse Response Filters 66%
• Energy Consumption 33%
• Parallel Computing 33%
• CMOS Technology 33%
• Computationally Intensive 33%
• Artificial Intelligence 33%
• Data Transfer 33%
• Memory chip 33%
• Post-CMOS 33%
• Superior Performance 33%
• Execution Time 33%
• Systematic Methodology 33%
• Consumption Time 33%
• Power Reduction 33%
• Digital Filter 33%
• Finite Impulse Response 33%
• Latency Reduction 33%
• Propagation Chain 33%
• Local Computation 33%
• Processing-In-Memory Architectures 33%
• Carry Propagation 33%
• Digital Signal Processing System 33%

Computer Science

• Number System 100%
• Digital Filter 100%
• Finite Impulse Response 66%
• Energy Consumption 33%
• Artificial Intelligence 33%
• Speed-up 33%
• Parallel Computation 33%
• Application Specific Integrated Circuit 33%
• Execution Time 33%
• Superior Performance 33%
• Finite Impulse Response Filter 33%
• Memory Architecture 33%
• Latency Reduction 33%
• Accelerator Memory 33%
• Digital Signal Processing System 33%
• Systematic Methodology 33%
• Application Filter 33%