Reliability considerations of high-k gate dielectrics deposited by various intermediate treatment

M. N. Bhuyian, Durgamadhab Misra

Research output: Contribution to journalArticlepeer-review

Abstract

Various intermediate treatments (annealing or plasma exposure) during cyclic atomic layer deposition process demonstrate enhanced EOT scaling over a single post-deposition annealing (PDA). In this work we have investigated the reliability of TiN/Hf0.2Zr0.8O2/SiON/Si gate stack where Hf0.2Zr0.8O2 was deposited by either intermediate annealing or exposure to Ar plasma in a cyclical process. The results were compared with the samples where the dielectric was deposited without any intermediate treatment. Stress-induced flat-band voltage shift (ΔVFB) and stress induced leakage current (SILC) indicate that intermediate plasma exposure yields improved reliability characteristics by suppressing the trap formation. Alloying of ZrO2 with HfO2 to form Hf1-xZrxO2 films with higher x value enhanced reliability performance further when compared to HfO2.

Original languageEnglish (US)
Pages (from-to)103-108
Number of pages6
JournalECS Transactions
Volume60
Issue number1
DOIs
StatePublished - Jan 1 2014

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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