Abstract
Defect generation in the interfacial SiO2 layer seems to be the leading breakdown mechanism in metal/high-κ/interfacial layer/Si gate stack. In this work we reaffirm the claim by studying systematically the breakdown mechanisms of HfO2 and SiO2 separately, deposited under same growth conditions. Individual breakdown characteristics of HfO2 without any interfacial layer using MIM capacitors and in situ steam grown (ISSG) SiO2 MOS capacitors with identical thicknesses were compared (I-t, Stress-induced leakage current) to that of the high-κ/IL/metal gate stack. It was observed that charge trapping and stress-induced trap formation in the interfacial layer contmues to be the soft spot for grate stack breakdown
Original language | English (US) |
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Title of host publication | ECS Transactions - 5th International Symposium on High Dielectric Constant Materials and Gate Stacks |
Pages | 629-638 |
Number of pages | 10 |
Volume | 11 |
Edition | 4 |
DOIs | |
State | Published - Dec 1 2007 |
Event | 5th International Symposium on High Dielectric Constant Materials and Gate Stacks - 212th ECS Meeting - Washington, DC, United States Duration: Oct 8 2007 → Oct 10 2007 |
Other
Other | 5th International Symposium on High Dielectric Constant Materials and Gate Stacks - 212th ECS Meeting |
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Country/Territory | United States |
City | Washington, DC |
Period | 10/8/07 → 10/10/07 |
All Science Journal Classification (ASJC) codes
- Engineering(all)