Role of interfacial layer on breakdown of TiN /high- κ gate stacks

Keyphrases

• Gate Stack 100%
• Interfacial Layer 100%
• Highest Layer 60%
• Breakdown Field 40%
• Constant Voltage Stress 40%
• Degradation Mechanism 20%
• HfO2 20%
• Process Conditions 20%
• Silica 20%
• Progressive Breakdown 20%
• Breakdown Characteristics 20%
• Pre-deposition 20%
• Surface Treatment 20%
• Charge Trapping 20%
• Interfacial Thickness 20%
• Stress Induced Leakage Current 20%
• Atomic Layer Deposited 20%
• Ramp Voltage Stress 20%
• Hard Breakdown 20%
• Soft Breakdown 20%
• Breakdown Behavior 20%
• Charged Defects 20%
• Defect Generation 20%

Engineering

• Gate Stack 100%
• Interfacial Layer 100%
• Constant Voltage 40%
• Breakdown Field 40%
• Defects 20%
• Atomic Layer 20%
• Layer Thickness 20%
• Degradation Mechanism 20%
• Process Condition 20%
• Stress Induced Leakage Current 20%

Material Science

• Charge Trapping 100%