Scalable digital cmos architecture for spike based supervised learning

Shruti R. Kulkarni, Bipin Rajendran

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Supervised learning algorithm for Spiking Neural Networks (SNN) based on Remote Supervised Method (ReSuMe) uses spike timing dependent plasticity (STDP) to adjust the synaptic weights. In this work, we present an optimal network configuration amenable to digital CMOS implementation and show that just 5 bits of resolution for the synaptic weights is sufficient to achieve fast convergence. We estimate that the implementation of this optimal network architecture in 65 nm and a futuristic 10 nm digital CMOS could result in systems with close to 0. 85 and 30 Million Synaptic Updates Per Second (MSUPS)/Watt.

Original languageEnglish (US)
Title of host publicationEngineering Applications of Neural Networks - 16th International Conference, EANN 2015, Proceedings
EditorsLazaros Iliadis, Chrisina Jayne
PublisherSpringer Verlag
Pages149-158
Number of pages10
ISBN (Print)9783319239811
DOIs
StatePublished - Jan 1 2015
Externally publishedYes
Event16th International Conference on Engineering Applications of Neural Networks, EANN 2015 - Rhodes, Greece
Duration: Sep 25 2015Sep 28 2015

Publication series

NameCommunications in Computer and Information Science
Volume517
ISSN (Print)1865-0929

Other

Other16th International Conference on Engineering Applications of Neural Networks, EANN 2015
CountryGreece
CityRhodes
Period9/25/159/28/15

All Science Journal Classification (ASJC) codes

  • Computer Science(all)
  • Mathematics(all)

Keywords

  • Bit-precision
  • Digital neuromorphic architecture
  • Spiking neural networks
  • Supervised learning

Fingerprint Dive into the research topics of 'Scalable digital cmos architecture for spike based supervised learning'. Together they form a unique fingerprint.

Cite this