Abstract
As wafer circuit widths shrink less than 10 nm, stringent quality control is imposed on the wafer fabrication processes. Therefore, wafer residency time constraints and chamber cleaning operations are widely required in chemical vapor deposition, coating processes, etc. They increase scheduling complexity in cluster tools. In this paper, we focus on scheduling single-arm multi-cluster tools with chamber cleaning operations subject to wafer residency time constraints. When a chamber is being cleaned, it can be viewed as processing a virtual wafer. In this way, chamber cleaning operations can be performed while wafer residency time constraints for real wafers are not violated. Based on such a method, we present the necessary and sufficient conditions to analytically check whether a single-arm multi-cluster tool can be scheduled with a chamber cleaning operation and wafer residency time constraints. An algorithm is proposed to adjust the cycle time for a cleaning operation that lasts a long cleaning time. Meanwhile, algorithms for a feasible schedule are also derived. And an algorithm is presented for operating a multi-cluster tool back to a steady state after the cleaning. Illustrative examples are given to show the application and effectiveness of the proposed method.
Original language | English (US) |
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Pages (from-to) | 1965-1983 |
Number of pages | 19 |
Journal | IEEE/CAA Journal of Automatica Sinica |
Volume | 10 |
Issue number | 10 |
DOIs | |
State | Published - Oct 1 2023 |
All Science Journal Classification (ASJC) codes
- Control and Systems Engineering
- Information Systems
- Control and Optimization
- Artificial Intelligence
Keywords
- Chamber cleaning
- multi-cluster tools
- scheduling
- semiconductor manufacturing