Scheduling for input-queued packet switches by a re-configurable parallel match evaluator

Spiridon F. Beldianu, Roberto Rojas-Cessa, Eiji Oki, Sotirios G. Ziavras

Research output: Contribution to journalArticlepeer-review

1 Scopus citations


A parallel match evaluator (PE) selects the most productive match for an input-queued (IQ) switch among several tested. However, current PE-based approaches use N fixed permutations out of possible N!, where N is the number of switch ports. A fixed permutation represents a permanent match between the inputs and outputs. To improve switching performance, this letter proposes a re-configurable PE (RPE) where permutations are selected according to traffic pattern, queue occupancy, or queuing times. This letter shows the performance improvement achieved with the proposed RPE.

Original languageEnglish (US)
Article number5439364
Pages (from-to)357-359
Number of pages3
JournalIEEE Communications Letters
Issue number4
StatePublished - Apr 2010

All Science Journal Classification (ASJC) codes

  • Modeling and Simulation
  • Computer Science Applications
  • Electrical and Electronic Engineering


  • Input-queued switch
  • Match evaluator
  • Maximal matching
  • Scheduling


Dive into the research topics of 'Scheduling for input-queued packet switches by a re-configurable parallel match evaluator'. Together they form a unique fingerprint.

Cite this