Screening of hot electron effect during plasma processing

P. Srinivasan, B. Vootukuru, D. Misra

Research output: Contribution to journalConference articlepeer-review

Abstract

CMOS devices are subjected to high-field electron injection during plasma processing. This work investigates the screening of hot carrier stress degradation in an n-channel MOSFET when the device was exposed to plasma processing. Devices with various antenna ratios were subjected to current stress (both gate injection and substrate injection) while the source and drain terminals were reverse biased by a screening potential followed by hot carrier stress. It was observed that screening of the drain edge was effective for both gate injection and substrate injection at different screening potentials. For higher antenna ratio devices, the hot carrier screening potential is reduced due to preexisting oxide traps. The hot carrier lifetime is directly related to interface state density (Dit, measured by charge pumping method. These results suggest that hot electron degradation could be severe or mild for devices affected by plasma damage depending on their exposure to the level of screening potential.

Original languageEnglish (US)
Pages (from-to)291-296
Number of pages6
JournalProceedings of the IEEE International Conference on VLSI Design
Volume17
StatePublished - May 24 2004
EventProceedings - 17th International Conference on VLSI Design, Concurrently with the 3rd International Conference on Embedded Systems Design - Mumbai, India
Duration: Jan 5 2004Jan 9 2004

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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