Abstract
The weighted syndrome sums approach to VLSI testing is applicable to self-testing, where the number of syndrome references needed to be stored in an on-chip ROS is kept minimum. A serial process and the hardware implementation of it which computes the weighted syndrome sums is described.
Original language | English (US) |
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Pages (from-to) | 4066-4069 |
Number of pages | 4 |
Journal | IBM technical disclosure bulletin |
Volume | 27 |
Issue number | 7 A |
State | Published - Dec 1984 |
Externally published | Yes |
All Science Journal Classification (ASJC) codes
- General Engineering