Silicon low noise amplifier chips for multi-chip module integration on a silicon-based substrate

J. Lin, J. S. Weiner, H. Sh Tsai, G. Georgiou, Y. K. Chen, K. L. Tai, M. Y. Lau, D. P. Kossives

Research output: Contribution to conferencePaperpeer-review

Abstract

A method of designing low noise amplifier (LNA) using multi-chip module (MCM) technology is described here. First, low noise amplifier blocks using silicon BiCMOS process were fabricated. Noise figure and gain of 2-6 GHz were measured at different bias voltages after chips were fabricated. These chips were designed for multi-chip module integration on a newly developed low cost, low loss silicon substrate on which high-Q matching inductors are fabricated. Since the electrical characteristics of passive components on MCM are well controlled and the electrical characteristics of active devices are measured after fabrication, design accuracy and high yield can be achieved. Two design examples of low noise amplifiers at 2 GHz and 5 GHz are discussed. The 2 GHz LNA design utilizes high-Q spiral inductors as matching components whereas the 5 GHz LNA design utilizes microstrip lines as matching inductors.

Original languageEnglish (US)
Pages121-124
Number of pages4
StatePublished - 1997
Externally publishedYes
EventProceedings of the 1997 IEEE Radio Frequency Integrated Circuits Symposium, RFIC - Denver, CO, USA
Duration: Jun 8 1997Jun 11 1997

Other

OtherProceedings of the 1997 IEEE Radio Frequency Integrated Circuits Symposium, RFIC
CityDenver, CO, USA
Period6/8/976/11/97

All Science Journal Classification (ASJC) codes

  • General Engineering

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