Abstract
Ion implantation and reactive ion etching are known to create defects in silicon which get cured during subsequent annealing operations. In this paper we have reported the annealing behavior of phosphorus implanted into strained SiGe layer at room temperature. The implantation was performed at 155 KeV with a dose of 1 × 1014/ cm2. Post implantation annealing was performed at 600, 700, 800 and 900°C for 10 s in a rapid thermal process furnace. Annealing behavior of defects generated as a consequence of dry etching is also reported. RTP annealing on reactive ion etching (RIE) etched samples were performed at 650, 700, 750 and 800 °C. I-V, C-V and DLTS measurements hint towards the presence of permanent dislocation loops created as a consequence of RIE and implantation causing strain relaxation.
Original language | English (US) |
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Pages (from-to) | 1611-1619 |
Number of pages | 9 |
Journal | Microelectronics Reliability |
Volume | 38 |
Issue number | 10 |
DOIs | |
State | Published - 1998 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Safety, Risk, Reliability and Quality
- Surfaces, Coatings and Films
- Atomic and Molecular Physics, and Optics
- Electrical and Electronic Engineering