Abstract
Classical testing of combinational circuits requires a list of the fault-free response of the circuit to the test set. For most practical circuits implemented today the large storage requirement for such a list makes such a test procedure very expensive. This paper describes a method of designing combinational circuits in such a way that their test procedure will require the knowledge of only one characteristic of the fault-free circuit, called the syndrome. This solves the storage problem associated with the test procedure. It is shown that the syndrome-testable design is inexpensive and can be easily implemented by the logic designer.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 137-140 |
| Number of pages | 4 |
| Journal | Proceedings - Annual International Conference on Fault-Tolerant Computing |
| State | Published - 1979 |
| Externally published | Yes |
| Event | Proc Annu Int Conf Fault Tolerant Comput 9th, Dig of Pap - Madison, WI, USA Duration: Jun 20 1979 → Jun 22 1979 |
All Science Journal Classification (ASJC) codes
- Hardware and Architecture