Abstract
Classical testing of combinational circuits requires a list of the fault-free response of the circuit to the test set. For most practical circuits implemented today the large storage requirement for such a list makes such a test procedure very expensive. Moreover, the computational cost to generate the test set increases exponentially with the circuit size. In this paper we describe a method of designing combinational circuits in such a way that their test procedure will require the knowledge of only one characteristic of the fault-free circuit, called the syndrome. This solves the storage problem associated with the test procedure. The syndrome-test procedure does not require test vector generation, and thus the expensive stage of test generation and fault simulation is eliminated.
Original language | English (US) |
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Pages (from-to) | 442-451 |
Number of pages | 10 |
Journal | IEEE Transactions on Computers |
Volume | C-29 |
Issue number | 6 |
DOIs | |
State | Published - Jun 1980 |
Externally published | Yes |
All Science Journal Classification (ASJC) codes
- Software
- Theoretical Computer Science
- Hardware and Architecture
- Computational Theory and Mathematics
Keywords
- Combinational circuit
- fan-out-free circuit
- minterm
- prime implicant
- single fault
- stuck-at fault