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Syndrome-Testable Design of Combinational Circuits
Jacob Savir
Research output
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Contribution to journal
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Article
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peer-review
129
Scopus citations
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Dive into the research topics of 'Syndrome-Testable Design of Combinational Circuits'. Together they form a unique fingerprint.
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Keyphrases
Combinational Circuits
100%
Testability Design
100%
Fault-free
66%
Large Storage
33%
Computational Cost
33%
Storage Requirement
33%
Fault Simulation
33%
Test Case Generation
33%
Generation Simulation
33%
Storage Problem
33%
Circuit Size
33%
Test Vector Generation
33%
Free Response
33%
Computer Science
Testable Design
100%
Combinational Circuit
100%
Computational Cost
33%
Storage Requirement
33%
Fault Simulation
33%
Test Generation
33%
Engineering
Test Procedure
100%
Combinatorial Circuits
100%
Computational Cost
25%
Storage Requirement
25%
Free Response
25%