Syndrome-Testable Design of Combinational Circuits

Keyphrases

• Combinational Circuits 100%
• Testability Design 100%
• Fault-free 66%
• Large Storage 33%
• Computational Cost 33%
• Storage Requirement 33%
• Fault Simulation 33%
• Test Case Generation 33%
• Generation Simulation 33%
• Storage Problem 33%
• Circuit Size 33%
• Test Vector Generation 33%
• Free Response 33%

Computer Science

• Testable Design 100%
• Combinational Circuit 100%
• Computational Cost 33%
• Storage Requirement 33%
• Fault Simulation 33%
• Test Generation 33%

Engineering

• Test Procedure 100%
• Combinatorial Circuits 100%
• Computational Cost 25%
• Storage Requirement 25%
• Free Response 25%