Test generators need to be modified to handle CMOS designs

Jacob Savir

doi:10.1109/IMTC.1997.612437

Test generators need to be modified to handle CMOS designs

Jacob Savir

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

CMOS designs have some unique properties that prevent existing test generators from computing a test vector for a fault when one might exist. The problem lies in the premises laid out on what it takes to detect a stuck-at fault. The basic premise that states that it is required to set a line to 0(1) in order to detect a stuck-at 1(0) fault, and then propagate the error to an observable point, is not a necessary and sufficient detection condition. This is due to the existence of unknown states throughout the logic. This paper shows an example to illustrate the problem; describes what it takes in order to remedy it; proposes possible enhancements to existing test generation algorithms, and outlines the risks faced in the event that no correcting steps are taken.

Original language	English (US)
Title of host publication	IMTC 1997 - IEEE Instrumentation and Measurement Technology Conference
Subtitle of host publication	Sensing, Processing, Networking, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1436-1441
Number of pages	6
ISBN (Electronic)	0780337476
DOIs	https://doi.org/10.1109/IMTC.1997.612437
State	Published - 1997
Event	14th Annual IEEE Instrumentation and Measurement Technology Conference, IMTC 1997 - Ottawa, Canada Duration: May 19 1997 → May 21 1997

Publication series

Name	Conference Record - IEEE Instrumentation and Measurement Technology Conference
Volume	2
ISSN (Print)	1091-5281

Other

Other	14th Annual IEEE Instrumentation and Measurement Technology Conference, IMTC 1997
Country/Territory	Canada
City	Ottawa
Period	5/19/97 → 5/21/97

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/IMTC.1997.612437

Cite this

Savir, J. (1997). Test generators need to be modified to handle CMOS designs. In IMTC 1997 - IEEE Instrumentation and Measurement Technology Conference: Sensing, Processing, Networking, Proceedings (pp. 1436-1441). Article 612437 (Conference Record - IEEE Instrumentation and Measurement Technology Conference; Vol. 2). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IMTC.1997.612437

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abstract = "CMOS designs have some unique properties that prevent existing test generators from computing a test vector for a fault when one might exist. The problem lies in the premises laid out on what it takes to detect a stuck-at fault. The basic premise that states that it is required to set a line to 0(1) in order to detect a stuck-at 1(0) fault, and then propagate the error to an observable point, is not a necessary and sufficient detection condition. This is due to the existence of unknown states throughout the logic. This paper shows an example to illustrate the problem; describes what it takes in order to remedy it; proposes possible enhancements to existing test generation algorithms, and outlines the risks faced in the event that no correcting steps are taken.",

author = "Jacob Savir",

note = "Publisher Copyright: {\textcopyright} 1997 IEEE.; 14th Annual IEEE Instrumentation and Measurement Technology Conference, IMTC 1997 ; Conference date: 19-05-1997 Through 21-05-1997",

year = "1997",

doi = "10.1109/IMTC.1997.612437",

language = "English (US)",

series = "Conference Record - IEEE Instrumentation and Measurement Technology Conference",

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Savir, J 1997, Test generators need to be modified to handle CMOS designs. in IMTC 1997 - IEEE Instrumentation and Measurement Technology Conference: Sensing, Processing, Networking, Proceedings., 612437, Conference Record - IEEE Instrumentation and Measurement Technology Conference, vol. 2, Institute of Electrical and Electronics Engineers Inc., pp. 1436-1441, 14th Annual IEEE Instrumentation and Measurement Technology Conference, IMTC 1997, Ottawa, Canada, 5/19/97. https://doi.org/10.1109/IMTC.1997.612437

Test generators need to be modified to handle CMOS designs. / Savir, Jacob.
IMTC 1997 - IEEE Instrumentation and Measurement Technology Conference: Sensing, Processing, Networking, Proceedings. Institute of Electrical and Electronics Engineers Inc., 1997. p. 1436-1441 612437 (Conference Record - IEEE Instrumentation and Measurement Technology Conference; Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - CMOS designs have some unique properties that prevent existing test generators from computing a test vector for a fault when one might exist. The problem lies in the premises laid out on what it takes to detect a stuck-at fault. The basic premise that states that it is required to set a line to 0(1) in order to detect a stuck-at 1(0) fault, and then propagate the error to an observable point, is not a necessary and sufficient detection condition. This is due to the existence of unknown states throughout the logic. This paper shows an example to illustrate the problem; describes what it takes in order to remedy it; proposes possible enhancements to existing test generation algorithms, and outlines the risks faced in the event that no correcting steps are taken.

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Savir J. Test generators need to be modified to handle CMOS designs. In IMTC 1997 - IEEE Instrumentation and Measurement Technology Conference: Sensing, Processing, Networking, Proceedings. Institute of Electrical and Electronics Engineers Inc. 1997. p. 1436-1441. 612437. (Conference Record - IEEE Instrumentation and Measurement Technology Conference). doi: 10.1109/IMTC.1997.612437

Test generators need to be modified to handle CMOS designs

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