TESTING FOR INTERMITTENT FAILURES IN COMBINATIONAL CIRCUITS BY MINIMIZING THE MEAN TESTING TIME FOR A GIVEN TEST QUALITY.

Research output: Contribution to conferencePaperpeer-review

Abstract

Since the cost of detecting and isolating intermittent faults in digital systems comprises a major part of the total testing cost, efficient methods to detect them are required. An optimal algorithm is proposed for testing for intermittent faults in combinational circuits which are vital parts of any computing system. The underlying optimality criterion is to minimize the mean testing time and still guarantee a given escape probability. This goal is achieved by applying input vectors with an optimal probability distribution.

Original languageEnglish (US)
Pages155-161
Number of pages7
StatePublished - 1978
Externally publishedYes
EventUSA - Jpn Comput Conf Proc, 3rd - San Francisco, CA, USA
Duration: Oct 10 1978Oct 12 1978

Conference

ConferenceUSA - Jpn Comput Conf Proc, 3rd
CitySan Francisco, CA, USA
Period10/10/7810/12/78

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Fingerprint Dive into the research topics of 'TESTING FOR INTERMITTENT FAILURES IN COMBINATIONAL CIRCUITS BY MINIMIZING THE MEAN TESTING TIME FOR A GIVEN TEST QUALITY.'. Together they form a unique fingerprint.

Cite this