Thermal considerations for monolithic integration of three-dimensional integrated circuits

A. K. Henning, B. Rajendran, B. Cronquist, Z. Or-Bach

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A major consideration for practical integration of 3D integrated circuits is compatibility of the thermal processes used to build new transistors in the vertical dimension, with sustained viability of the devices already fabricated beneath. Major contributions to the thermal profile of IC processes are laser-based anneals, rapid-thermal anneals and deposition processes, and traditional furnace processes for both annealing and film deposition. In this work, we consider the thermal compatibility of laser annealing of newly built 3D structures, with the ICs lying beneath.

Original languageEnglish (US)
Title of host publication2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013
PublisherIEEE Computer Society
ISBN (Print)9781479913602
DOIs
StatePublished - 2013
Externally publishedYes
Event2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013 - Monterey, CA, United States
Duration: Oct 7 2013Oct 10 2013

Publication series

Name2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013

Other

Other2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013
Country/TerritoryUnited States
CityMonterey, CA
Period10/7/1310/10/13

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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