TY - GEN
T1 - TrackGNN
T2 - 27th International Symposium on Quality Electronic Design, ISQED 2026
AU - Li, Shuyang
AU - Zhang, Hanqing
AU - Chen, Ruiqi
AU - Da Silva, Bruno
AU - Borca-Tasciuc, Giorgian
AU - Yu, Dantong
AU - Hao, Cong Callie
N1 - Publisher Copyright:
© 2026 IEEE.
PY - 2026
Y1 - 2026
N2 - Track reconstruction is essential in high-energy physics (HEP) to identify charged particles and understand their properties. Graph neural networks (GNNs) show great promise as an alternative. However, the stringent real-time and low-latency requirements in trigger decision pose significant challenges for deploying GNN inference in modern particle tracking systems. In this work, we achieve real-time track reconstruction on FPGAs by proposing TrackGNN, a high-performance FPGA-based dataflow accelerator. TrackGNN leverages a streaming architecture with multiple levels of parallelism. In particular, we introduce a novel self-adaptive renaming mechanism to improve data locality in the graph structure, reducing initiation delays and pipeline stalls. We also explore a fixed-point quantization strategy to improve energy efficiency and maintain model accuracy. Experimental results show that TrackGNN achieves 27.6 × and 4.9 - 101.1 × speedup over CPUs and GPUs, respectively, along with 55.36 × and 515.46 × better energy efficiency. Compared to the state-of-the-art FPGA-based GNN accelerator, TrackGNN delivers a 16.67% performance boost with FlowGNN [1],a gain directly attributable to the proposed renaming process, and 5.7 × speedup over overlay architectures. TrackGNN is fully open-sourced and available at https://github.com/silvenachen/TrackGNN.
AB - Track reconstruction is essential in high-energy physics (HEP) to identify charged particles and understand their properties. Graph neural networks (GNNs) show great promise as an alternative. However, the stringent real-time and low-latency requirements in trigger decision pose significant challenges for deploying GNN inference in modern particle tracking systems. In this work, we achieve real-time track reconstruction on FPGAs by proposing TrackGNN, a high-performance FPGA-based dataflow accelerator. TrackGNN leverages a streaming architecture with multiple levels of parallelism. In particular, we introduce a novel self-adaptive renaming mechanism to improve data locality in the graph structure, reducing initiation delays and pipeline stalls. We also explore a fixed-point quantization strategy to improve energy efficiency and maintain model accuracy. Experimental results show that TrackGNN achieves 27.6 × and 4.9 - 101.1 × speedup over CPUs and GPUs, respectively, along with 55.36 × and 515.46 × better energy efficiency. Compared to the state-of-the-art FPGA-based GNN accelerator, TrackGNN delivers a 16.67% performance boost with FlowGNN [1],a gain directly attributable to the proposed renaming process, and 5.7 × speedup over overlay architectures. TrackGNN is fully open-sourced and available at https://github.com/silvenachen/TrackGNN.
KW - Dataflow Architecture
KW - Graph Neural Network (GNN)
KW - High Energy Physics
KW - Track Reconstruction
UR - https://www.scopus.com/pages/publications/105041347483
UR - https://www.scopus.com/pages/publications/105041347483#tab=citedBy
U2 - 10.1109/ISQED69900.2026.11534685
DO - 10.1109/ISQED69900.2026.11534685
M3 - Conference contribution
AN - SCOPUS:105041347483
T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED
BT - Proceedings of the 27th International Symposium on Quality Electronic Design, ISQED 2026
PB - IEEE Computer Society
Y2 - 8 April 2026 through 10 April 2026
ER -