TRB: Tag replication buffer for enhancing the reliability of the cache tag array

Shuai Wang, Jie Hu, Sotirios Ziavras

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

Protecting the on-chip cache memories against soft errors has become an increasing challenge in designing new generation reliable microprocessors. Previous efforts have mainly focused on improving the reliability of the cache data arrays. Due to its crucial importance to the correctness of cache accesses, the tag array demands high reliability against soft errors while the data array is fully protected. Exploiting the address locality of memory accesses, we propose to duplicate most recently accessed tag entries in a small Tag Replication Buffer (TRB) thus to protect the information integrity of the tag array In the data cache with low performance, energy and area overheads. A Selective-TRB scheme is further proposed to protect only tag entries of dirty cachelines. The experimental results show that the Selective-TRB scheme achieves a higher access-with-repllca (AWR) rate of 97.4% for the dirty-cacheline tags. To provide a comprehensive evaluation of the tag-array reliability, we also conduct an architectural vulnerability factor (AVF) analysis for the tag array and propose a refined metric, detected-withoutrepllca-AVF (DOR-AVF), which combines the AVF and AWR analysis. Based on our DOR-AVF analysis, a TRB scheme with early write-back (EWB) is proposed, which achieves a zero DORAVF at a negligible performance overhead.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE Annual Symposium on VLSI, ISVLSI 2010
Pages310-315
Number of pages6
DOIs
StatePublished - Oct 20 2010
EventIEEE Annual Symposium on VLSI, ISVLSI 2010 - Lixouri, Kefalonia, Greece
Duration: Jul 5 2010Jul 7 2010

Other

OtherIEEE Annual Symposium on VLSI, ISVLSI 2010
CountryGreece
CityLixouri, Kefalonia
Period7/5/107/7/10

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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