Abstract
In this paper, we develop a Verilog-A model for a memristive device that has shown non-volatile state transitions via half-integer quantized conductance states at room temperature and an on-off ratio of ∼ 103. The model captures the geometrical evolution of a nano-filament and maps it to conductance levels in the equivalent electrical circuit, thereby accurately capturing the DC I-V and transient response of the device. The suitability of the model for circuit simulations is illustrated via a 4 χ 4 crossbar array programming simulation in HSPICE which captures the multilevel programmability of the device.
Original language | English (US) |
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Title of host publication | 2016 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2016 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 169-172 |
Number of pages | 4 |
ISBN (Electronic) | 9781509008179 |
DOIs | |
State | Published - Oct 20 2016 |
Event | 2016 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2016 - Nuremberg, Germany Duration: Sep 6 2016 → Sep 8 2016 |
Other
Other | 2016 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2016 |
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Country/Territory | Germany |
City | Nuremberg |
Period | 9/6/16 → 9/8/16 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
- Computer Science Applications
- Modeling and Simulation