Versatile design of shared vector coprocessors for multicores

Keyphrases

• Multicore 100%
• Vector Coprocessor 100%
• High Performance 80%
• Coprocessor Sharing 60%
• Resource Utilization 40%
• Temporal Sharing 40%
• Vector Length 40%
• Sharing Policy 40%
• Design Framework 20%
• Low Energy 20%
• Motivation 20%
• Low Power 20%
• Encoding Method 20%
• Power Consumption 20%
• Architecture-centric 20%
• Energy Cost 20%
• On chip 20%
• Parallelization 20%
• High Utilization 20%
• Energy Reduction 20%
• Omnipresence 20%
• Dynamic Environment 20%
• Multiple Cores 20%
• Embedded Applications 20%
• Vector Kernels 20%
• Matrix multiplication 20%
• Vector Operation 20%
• FIR Filter 20%
• Power Performance 20%
• Data Parallelism 20%
• Floating-point 20%
• LU Decomposition 20%
• Multicore Design 20%
• D-vector 20%
• Area Cost 20%
• Dual-core System 20%
• Reduced Area 20%
• Energy per Operation 20%
• Vector Parallelism 20%
• Sparse Matrix-vector multiplication (SpMV) 20%
• SystemVerilog 20%
• Length Variation 20%
• Decomposition Matrices 20%
• Lane Sharing 20%

Computer Science

• Multicore 100%
• Coprocessor 100%
• Benchmarking 33%
• Resource Utilisation 33%
• Design Framework 16%
• Power Consumption 16%
• Parallelism 16%
• Dynamic Environment 16%
• Embedded Application 16%
• Matrix Multiplication 16%
• Vector Operation 16%
• Coding Technique 16%
• Floating Point 16%
• Data Parallelism 16%
• Sparse Matrix-Vector Multiplication 16%
• Point Performance 16%
• Vector Parallelism 16%