@inproceedings{58b7c186b41a42ca9e885c0cc84d81d1,
title = "Versatile processor design for efficiency and high performance",
abstract = "New architectural concepts are introduced for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2-CPU (Data-Driven processor) follows the natural flow of programs, minimizes the number of redundant operations, lowers the hardware cost, and reduces the power consumption. Instructions enter the processing unit when they are ready to execute or when all their operand(s) are to be available within a f a 0 clock cycles. This approach results in outstanding pedormance and elimination of large numbers of redundant operations that plague current processor designs. A comparative analysis of our design with conventional designsproves that it is capable of better perj6ormunce and higher efficiency.",
author = "Ziavras, {Sotirios G.}",
note = "Publisher Copyright: {\textcopyright} 2000 IEEE.; 5th International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000 ; Conference date: 07-12-2000 Through 09-12-2000",
year = "2000",
doi = "10.1109/ISPAN.2000.900295",
language = "English (US)",
series = "Proceedings - International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "266--271",
editor = "Hal Sudborough and Burkhard Monien and Hsu, {D. Frank}",
booktitle = "Proceedings - International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000",
address = "United States",
}