Virtual production lines design for back-end semiconductor manufacturing systems

Ying Tang; Meng Chu Zhou; Robin G. Qiu

doi:10.1109/TSM.2003.815205

Virtual production lines design for back-end semiconductor manufacturing systems

Ying Tang
, Meng Chu Zhou
, Robin G. Qiu

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

21 Scopus citations

Abstract

This paper introduces the virtual production line (VPL) concept, which initiates a new method to model the shop floor from both control and management point of view. Heuristic algorithms are presented to dynamically configure a large system into many VPLs, which ensure the line balance and efficiency, and accurately predicate the completion time for each work-order. The proposed methodology and algorithms are demonstrated through a simplified back-end semiconductor manufacturing system.

Original language	English (US)
Pages (from-to)	543-550
Number of pages	8
Journal	IEEE Transactions on Semiconductor Manufacturing
Volume	16
Issue number	3
DOIs	https://doi.org/10.1109/TSM.2003.815205
State	Published - Aug 2003

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Industrial and Manufacturing Engineering
Electrical and Electronic Engineering

Keywords

Heuristic algorithm
Manufacturing execution system
Production configuration
Virtual production line

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10.1109/TSM.2003.815205

Cite this

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title = "Virtual production lines design for back-end semiconductor manufacturing systems",

abstract = "This paper introduces the virtual production line (VPL) concept, which initiates a new method to model the shop floor from both control and management point of view. Heuristic algorithms are presented to dynamically configure a large system into many VPLs, which ensure the line balance and efficiency, and accurately predicate the completion time for each work-order. The proposed methodology and algorithms are demonstrated through a simplified back-end semiconductor manufacturing system.",

keywords = "Heuristic algorithm, Manufacturing execution system, Production configuration, Virtual production line",

author = "Ying Tang and Zhou, \{Meng Chu\} and Qiu, \{Robin G.\}",

note = "Funding Information: Manuscript received October 8, 2002; revised February 24, 2003. This work was supported by Kulicke \& Soffa Industries, Inc. The work of M. Zhou was supported in part by the National Outstanding Young Scientist Research Award from the National Natural Science Foundation of China.",

year = "2003",

month = aug,

doi = "10.1109/TSM.2003.815205",

language = "English (US)",

volume = "16",

pages = "543--550",

journal = "IEEE Transactions on Semiconductor Manufacturing",

issn = "0894-6507",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "3",

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T1 - Virtual production lines design for back-end semiconductor manufacturing systems

AU - Tang, Ying

AU - Zhou, Meng Chu

AU - Qiu, Robin G.

N1 - Funding Information: Manuscript received October 8, 2002; revised February 24, 2003. This work was supported by Kulicke & Soffa Industries, Inc. The work of M. Zhou was supported in part by the National Outstanding Young Scientist Research Award from the National Natural Science Foundation of China.

PY - 2003/8

Y1 - 2003/8

N2 - This paper introduces the virtual production line (VPL) concept, which initiates a new method to model the shop floor from both control and management point of view. Heuristic algorithms are presented to dynamically configure a large system into many VPLs, which ensure the line balance and efficiency, and accurately predicate the completion time for each work-order. The proposed methodology and algorithms are demonstrated through a simplified back-end semiconductor manufacturing system.

AB - This paper introduces the virtual production line (VPL) concept, which initiates a new method to model the shop floor from both control and management point of view. Heuristic algorithms are presented to dynamically configure a large system into many VPLs, which ensure the line balance and efficiency, and accurately predicate the completion time for each work-order. The proposed methodology and algorithms are demonstrated through a simplified back-end semiconductor manufacturing system.

KW - Heuristic algorithm

KW - Manufacturing execution system

KW - Production configuration

KW - Virtual production line

UR - https://www.scopus.com/pages/publications/0042386739

UR - https://www.scopus.com/pages/publications/0042386739#tab=citedBy

U2 - 10.1109/TSM.2003.815205

DO - 10.1109/TSM.2003.815205

M3 - Article

AN - SCOPUS:0042386739

SN - 0894-6507

VL - 16

SP - 543

EP - 550

JO - IEEE Transactions on Semiconductor Manufacturing

JF - IEEE Transactions on Semiconductor Manufacturing

IS - 3

ER -

Virtual production lines design for back-end semiconductor manufacturing systems

Abstract

All Science Journal Classification (ASJC) codes

Keywords

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